Today, ARM has unveiled its next-generation multi-core micro-architecture designed to boost the performance and efficiency of multi-core Cortex-A processors, which form the basis of many mobile and server SoCs. Known as DynamIQ, the new technology will be heading to automotive, smart home, smartphone, and other connected device markets in the near feature.

DynamIQ is an evolution of ARM’s existing big.LITTLE technology, the heterogeneous computing architecture that connects together and manages dual ARM CPU core clusters in multi-core configurations. DynamIQ takes this a step further by enabling big.LITTLE configurations of up to eight different CPU cores on a single compute cluster for the first time. This offers SoC designers much greater flexibility than ever before.

This means that rather than shifting resources between two clusters, each designed with different memory, performance and energy efficiency targets in mind, DynamIQ allows for the same and greater flexibility in a single cluster. Rather than having four Cortex-A73 cores in one cluster and four low power A53s in another, with DynamIQ SoC designers can pair a combination of ARM cores together on a single cluster with a shared a memory pool.

Importantly, each CPU core’s voltage, operating frequency, and sleep state can be controlled individually, which allows for fine-grain control over performance and power consumption. Other IP blocks, such as accelerators, also appear to be able to gain low latency access to the cluster, which could be used to boost performance of security or other processing components inside an SoC that are connected to the CPU.

The end result should allow for faster task switching and better task matching than ever before. ARM is keeping the exact details about how this new thread optimization system works under wraps for now. There’s also a redesigned memory sub-system, which only powers the required memory banks at any given time, and this should boost performance and battery life further.

ARM states that DynamIQ big.LITTLE configurations could feature 1+3, 2+4, 1+7, and other core configurations that we haven’t seen before, which will clear the way for more specialized SoCs for the next 100 billion devices ARM expects to power by 2021. Clusters can also be scaled up beyond just two, which could provide a boost to automotive and server platforms.

Speaking of new markets, ARM has also developed new dedicated processor instructions for artificial intelligence and machine learning applications, which will presumably be introduced in a new CPU design somewhere down the line. The company expects that its Cortex-A processors designed for DynamIQ can be optimized to provide a 50x boost to AI performance over the next 3-5 years, and provide a 10x faster response between the CPU and on-chip accelerator hardware for superior heterogeneous compute capabilities.

These are some exciting developments for ARM’s multi-core processors, and the company says that it will be sharing more details about DynamIQ in the coming months.

Robert Triggs
Lead Technical Writer at Android Authority, covering the latest trends in consumer electronics and hardware. In his spare moments, you'll probably find him tinkering with audio electronics and programming.