Today, ARM has announced its latest Cortex processor, the Cortex-A32, offering wearable and rich embedded processor manufacturers a new upgrade path over the older Cortex-A5 and A7 CPU cores. The Cortex-A32 is ARM’s smallest and lowest power ARMv8-A processor. You would normally associate ARMv8 with 64-bit computing, but unlike the company’s other ARMv8-A designs the A32 is 32-bit only. That is why ARM prefers to talk about AArch32 and AArch64, but more about that in a moment.
Unlike ARM’s Cortex-R8 announcement last week, the Cortex-A32 is designed for Rich OS and high performance situations, where ultra-high energy efficiency is a requirement. This is unlikely to power your next smartphone, but it has been specifically designed with wearable and internet-of-things (IoT) devices in mind.
Looking a little closer at the chip, it is based on a very similar design to the Cortex-A35, but it isn’t just a cut down version. The Cortex-A32 can be scaled up to quad-core implementations while still drawing less than 75mW when clocked at 1GHz. Alternatively, the design can draw less than 4mW in a single core configuration clocked at just 100MHz, all while fitting in an area smaller than 0.25 mm2. Hardware vendors can also configure cache sizes, with L1 configurable from 8KB to 32KB and L2 reaching up to 1MB in size.
ARM boasts 25 percent greater energy efficiency than the Cortex-A7, allowing for more performance and lower power consumption than before. In streaming and crypto scenarios, ARM touts major performance improvements for the Cortex-A32 over the older A5 and A7, suggesting that it can reach roughly the same performance as the A35 while being 10 percent more energy efficient.
Now for the part about 32-bit. Although we have already seen some wearables make the move into the 64-bit era, ARM expects that the vast majority of embedded devices while remain on 32-bit for the foreseeable future. So, ARM is essentially offering developers an optimized chip that features the level of performance and energy efficiency that they need, without the specifications that would be left redundant.
This is quite a smart move for another reason too. Not only is AArch32 backwards compatible with ARMv7-A, but there are also more than 100 additional 32-bit instructions included with ARMv8-A as well. These include additional floating-point instructions for MaxNum and float to int conversions among others, advanced SIMD improvements, instruction level support for Cryptography, and load acquire/store release. In other words, certain programming instances can be made more efficient and perhaps even run faster than on the older ARMv7-A processors, even though they are both 32-bit.
The 32-bit nature of the CPU core does have some drawbacks though. It obviously can’t make use of the improved 64-bit instructions in ARMv8 or larger registers, and isn’t compatible for use in a big.LITTLE multi-core arrangement, but these are outside of the target use cases for the core anyway.
For developers, they can quickly get starting using the same development tools as before for ARMv8 AArch32, complete with NEON and Crypto instructions. All of the development tools are already in place, so we’ll just be waiting on the silicon.