[Updated] Fixed incorrect information about Tegra 3 manufacturing process.
I’m not going to bore you with all the technical details, but a quick primer is required in this context: die shrinking is the process that basically allows for more processor dies to be produced on the same wafer. A lot of geeks (me included) get super hyped up when chip manufacturers announce that they are developing technology to shrink the dies even further. And all the enthusiasm is for good reason, as die shrinking brings both greater performance and decreased production costs per chip, since more chips can be cut out of a single wafer. The magic combo, if you will!
For your reference, the Clarkdale Core i5 and Core i7 processors, released by Intel in 2010, are manufactured using the 32nm process, while one of the most popular chips in today’s mobile industry, the quad-core Tegra 3, is manufactured using the 40nm process. The main competitor for NVIDIA’s Tegra series is Qualcomm’s S4 chip, that uses a 28nm process.
Roughly, the main advantages of the 28 nm manufacturing process over the 40nm one are:
If the explanations above caught your interest, you’ll be glad to learn that both Samsung and IBM are already producing test wafers based on the 20nm technology, estimated to reach the consumer market over the next couple of years. Even further, both tech giants have recently showcased wafers produced using the 14nm technology. Unfortunately, Samsung and IBM were reluctant in providing the full specs, so we have no way of knowing how what level of performance boost will the new manufacturing process produce. It’s a good thing to know they are coming, although I wouldn’t get all hyped up before we get some benchmark results first.
Note: If you are curious to know why die wafers are round and not square (as many would expect them to be), here is a very useful article on the topic.
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When do we get to 1nm?
It is impossible to get to 1nm without rendering the transistor unusable… There is a practical limit to channel lengths and miniaturization beyond which the transistor cannot switch between 1 and 0… This limit happens to be 11nm… So we either need a new way of storing data(quantum computing) or we need elements other than Silicon and Germanium which have higher bandgaps and higher threshold voltages to compensate for the ON-OFF issue.
Tegra 3 , like tegra 2 , is in 40nm..
I think cpu technology is the only one where there are no tradeoffs. New chips are always faster, better built and consume less power. It’s weird.
Cool story bro. Intel is about to launch 22nm processors and has been testing 14nm for a while now.